View EN5227_8360060.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

61108hkim/52004tn(ot)/60200rm (ot) no. 5227-1/19 http://onsemi.com semiconductor components industries, llc, 2013 june, 2013 stk672-040-e overview the stk672-040-e is a stepping motor driver hybrid ic that uses power mosfets in the output stage. it includes a built-in microstepping controller and is based on a uni polar constant-current pwm system. the stk672-040-e supports application simplification and standardization by providing a built-in 4 phase distribution stepping motor controller. it supports five excitation methods: 2 phase, 1-2 phase, w1-2 phase, 2w1-2 phase, and 4w1-2 phase excitations, and can provide control of the basic stepping angle of the stepping motor divided into 1/16 step units. it also allows the motor speed to be controlled with only a clock signal. the use of this hybrid ic allows designers to implement sy stems that provide high motor torques, low vibration levels, low noise, fast response, and high-efficiency drive. applications ? facsimile stepping motor drive (send and receive) ? paper feed and optical system stepping motor drive in copiers ? laser printer drum drive ? printer carriage stepping motor drive ? x-y plotter pen drive ? other stepping motor applications note*: conditions: v cc 1 = 24v, i oh = 1.5a, 2w1-2 excitation mode. ordering number : EN5227d thick-film hybrid ic unipolar constant-c urrent chopper (external excitation pwm) circuit with built-in microstepping controller stepping motor driver (sine wave drive) output current 1.5a (no heat sink*)
stk672-040-e no. 5227-2/19 features ? can implement stepping motor drive systems simply by providing a dc power supply and a clock pulse generator. ? one of five drive types can be selected with the drive mode settings (m1, m2, and m3) 1) 2 phase excitation drive 2) 1-2 phase excitation drive 3) w1-2 phase excitation drive 4) 2w1-2 phase excitation drive 5) 4w1-2 phase excitation drive ? provides four freely selectable modes for the vector locus during microstepping drive: circular mode, one inside mode, and two outside modes. ? phase retention even if excitation is switched. ? the excitation phase state can be verified in real time using the mo1, mo2, and moi signal output pins. ? the clk input counter block can be selected to be one of the following by the high/low setting of the m3 input pin. 1) rising edge only 2) both rising and falling edges ? the clk and return input pins include built-in malfunc tion prevention circuits for external pulse noise. ? enable and reset pins provided. these ar e schmitt trigger inputs with built-in 20k (typical) pull-up resistors. ? no noise generation due to the differe nce between the a and b phase time cons tants during motor hold since external excitation is used. ? microstepping operation supported even for small motor curr ents, since the reference voltage vref can be set to any value between 0v and 1/2v cc 2. ? external excitation pwm drive allows a wide operating supply voltage range (v cc 1 = 10 to 45v) to be used. ? current detection resistor (0.33 ) built-in the hybrid ic itself. ? power mosfets adopted for low drive loss. ? provides a motor output drive current of i oh = 1.5a. specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage 1 v cc 1 max no signal 52 v maximum supply voltage 2 v cc 2 max no signal -0.3 to +7.0 v input voltage v in max logic input pins -0.3 to +7.0 v output current i oh max 0.5s, 1 pulse, when v cc 1 applied. load: r = 5 , l = 10mh for each phase. 2.2 a repeated avalanche capacity ear max 38 mj allowable power dissipation pd max c-a = 0 12 w operating substrate temperature tc max 105 c junction temperature tj max 150 c storage temperature tstg -40 to +125 c allowable operating ranges at ta = 25 c parameter symbol conditions ratings unit supply voltage 1 v cc 1 with signals applied 10 to 45 v supply voltage 2 v cc 2 with signals applied 5 5% v input voltage v ih 0 to v cc 2v phase driver withstand voltage v dss tr1, 2, 3, and 4 (the a, a, b, and b outputs) 100 (min) v output current i oh duty 50% 1.5 a stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
stk672-040-e no. 5227-3/19 electrical characteristics at tc = 25 c, v cc 1 = 24v, v cc 2 = 5v rating parameters symbols conditions min typ max unit control supply current i cc pin 7, with enable pin held low. 4.5 15 ma output saturation voltage vsat r l = 15 (i 1.5 a) 1.4 1.9 v average output current ioave load: r = 3.5 / l = 3.8mh for each phase, vref 1v 0.465 0.517 0.569 a fet diode forward voltage vdf if = 1a 1.2 1.8 v [control inputs] v ih except for the vref pin 4 v input voltage v il except for the vref pin 1 v i ih except for the vref pin 0 1 10 a input current i il except for the vref pin 125 250 510 a [vref input pin] input voltage v i pin 8 0 2.5 v input current i i pin 8 1 a [control outputs] v oh i = ?3ma, pins moi, mo1, mo2 2.4 v output voltage v ol i = +3ma, pins moi, mo1, mo2 0.4 v [current distribution ratio (ab)] 2w1-2, w1-2, 1-2 vref = 1/8 100 % 2w1-2, w1-2 vref = 2/8 92 % 2w1-2 vref = 3/8 83 % 2w1-2, w1-2, 1-2 vref = 4/8 71 % 2w1-2 vref = 5/8 55 % 2w1-2, w1-2 vref = 6/8 40 % 2w1-2 vref = 7/8 20 % 2 vref 100 % pwm frequency fc 37 47 57 khz note: a constant-voltage power supply must be used. the design target value is shown for the current distribution ratio. package dimensions unit:mm (typ) 4161 122 53.0 0.5 2.0 22.0 9.0 0.4 2.9 4.0 1.0 21 2=42
stk672-040-e no. 5227-4/19 internal block diagram 21 20 19 16 18 22 17 11 14 15 10 9 7 12 13 8 6 5 2 1 + ? + ? + ? + ? + ? 3 4 m1 m2 cwb clk m3 return reset moi mo1 mo2 enable sg sub pg b b a a vref m5 m4 v cc 2 excitation mode control excitation state monitor phase advance counter current distribution ratio switching pseudo-sine wave generator rise detection rc oscillator itf02366 pwm control reference clock generation phase excitation drive signal generation rise/fall detection and switching
stk672-040-e no. 5227-5/19 test circuit diagrams vsat vdf i ih , i il ioave, i cc , fc when measuring ioave: with sw1 set to ?a?, vref = 1v when measuring fc: with sw 1 set to ?b?, vref = 0v when measuring i cc : set enable low 14 9 10 8 16 22 1 3 4 2 5 6 a 15 a b b 7 + v cc 2 v cc 2 stk672-040-e start v ref=2.5v v v cc 1 itf02367 22 1 2 5 6 a a b b 7 stk672-040-e v a itf02368 3 4 9 22 7 v cc 2 m1 stk672-040-e itf02369 10 m2 11 m3 12 m4 13 m5 14 14 clk 15 cwb 16 reset 17 return 18 enable 8 vref i il i ih a + 14 9 10 8 16 22 1 5 2 6 a a b a b a b sw2 sw1 b 7 18 v cc 2 v cc 2 vref=1v 0v 5v 0v low when measuring i cc v cc 1 v cc 1 stk672-040-e itf02370 a a start
stk672-040-e no. 5227-6/19 power-on reset the application must perform a power-on reset operation when v cc 2 power is first applied to this hybrid ic. application circuit that used 2w1-2 phase excitation (microstepping operation) mode. setting the motor current the motor current i oh is set by the vref voltage on the hybrid ic pin 8. the following formula gives the relationship between i oh and vref. i oh = vref/rs, rs: the hybrid ic intern al current detection resistor (0.33 3%) applications can use motor currents from the current (0.05 to 0.1a) set by the duty of the frequency set by the oscillator up to the limit of the allowable operating range, i oh = 1.5a function table m2 0 0 1 1 m1 m3 0 1 0 1 phase switching clock edge timing 1 2 phase excitation 1-2 phase excitation w1-2 phase excitation 2w1-2 phase excitation rising edge only 0 1-2 phase excitation w1-2 phase excitation 2w1-2 phase excitation 4w1-2 phase excitation rising and falling edges forward reverse enable motor current is cut off when low cwb 0 1 reset active low a a b b mo1 1 0 0 1 mo2 0 0 1 1 3 1 8 6 a a 7 22 12 11 10 9 14 13 15 14 18 16 17 19 + + v cc 2=5v v cc 2=5v sg 100 f or higher pg vref v cc 2=5v clk 1k enable ret reset moi v cc 1=10v to 45v two-phase stepping motor stk672-040-e itf02371 b b 5 2 1 3 4 20 mo1 21 mo2 0a motor current waveform ioave a12395 i ol i oh
stk672-040-e no. 5227-7/19 printed circuit board design recommendations this hybrid ic has two grounds, the pg pins (pins 3 and 4) and the sg pin (pin 22). these are connected internally in the hybrid ic. two power supplies are required: a motor drive supply and a 5v supply for the hybrid ic itself. if the ground connections for these supplies are not good, the motor current waveforms may become unstable, motor noise may increase, and vibration levels may increas e. use appropriate wiring for these gr ounds. here we present two methods for implementing these ground connections. if the grounds for the motor drive supply and the hybrid ic 5v supply are connected in th e immediate vicinity of the power supplies: ? if pg and sg are shorted at the power supply, connect only the pg line to pins 3 and 4 on the hybrid ic. also, be sure that no problems occur due to voltage drops due to common impedances. in the specifications, this must be v cc 2 5%. ? the current waveforms will be more stable if the vref ground is connected to pin 22. ? for initial values, use 100 f or over for c1 and 10 f or over for c2. locate c1 as close to the hybrid ic as possible, and the capacitor ground line must be as short as possible. if the grounds for the motor drive supply and the hybrid ic 5v supply are separated: ? insert a capacitor (c1) of 100 f or over as close as possible to the hybrid ic. the capacitor ground line must be as short as possible. the capacitor c2 may be included if necessary. its ground line should also be as short as possible. sg 3 4 pg stk672-040-e v cc 2 vref clk 7 8 22 14 -- + -- + sg pg c1 + + itf02372 motor drive power supply 5v power supply 100 f or over stepping motor c2 10 f or over oscillator circuit (clk) sg 3 4 pg stk672-040-e v cc 2 vref clk 7 8 22 14 -- + -- + sg pg c1 + + itf02373 separation motor drive power supply 5v power supply 100 f or over stepping motor c2 10 f or over oscillator circuit (clk)
stk672-040-e no. 5227-8/19 functional description external excitation chopper drive block description driver block basic circuit structure since this hybrid ic adopts an external excitation method, no external oscillator circuit is required. when a high level is input to a in the basic driver block circuit shown in the figure and the mosfet is turned on, the comparator + input will go low and the comparator output will go low. since a set signal with the pwm period will be input, the q output will go high, and the mosf et will be turned on as its initial value. the current i on flowing in the mosfet passes through l1 and generates a potential difference in rs. then, when the rs potential and the vref potential become the same, the co mparator output will invert, and the reset signal q output will invert to the low level. then, the mosfet will be turned off and the energy stored in l1 will be induced in l2 and the current i off will be regenerated to the power supply. this state will be maintained until the time when an input to the latch circuit set pin occurs. in this manner, the q output is turned off and on repeatedly by the reset and set signals, thus implementing constant current control. the resistor and capacito r on the comparator input are spike re moval circuit elements and synchronize with the pwm frequency. since this hybrid ic uses a fixed frequency due to the external excitation method and at the same time also adopts a synchronized pwm technique, it ca n suppress the noise associated with holding a position when the motor is locked. input pin functions pin no. symbol function pin circuit type 14 clk phase switching clock built-in pull-up resistor cmos schmitt trigger input 15 cwb rotation direction setting (cw/ccw) built-in pull-up resistor cmos schmitt trigger input 17 return forced phase origin return built-in pull-up resistor cmos schmitt trigger input 18 enable output cutoff built-in pull-up resistor cmos schmitt trigger input 9, 10, 11 m1, m2, m3 excitation mode setting built-in pull-up resistor cmos schmitt trigger input 12, 13 m4, m5 vector locus setting built-in pull-up resistor cmos schmitt trigger input 16 reset system reset built-in pull-up resistor cmos schmitt trigger input 8 vref current setting operational amplifier input itf02374 d1 rs l2 v cc 1 i off l1 a a mosfet and q s r 800khz 45khz latch circuit noise filter cr oscillator divider current divider m4 m5 vref a=1 + ? enable a (control signal) i on
stk672-040-e no. 5227-9/19 input signal functions and timing ? clk (phase switching clock) 1) input frequency range: dc to 50khz 2) minimum pulse width: 10 s 3) duty: 40 to 60% (however, the minimum pulse width takes precedence when m3 is high.) 4) pin circuit type: built-in pull-up resistor (20k , typical) cmos schmitt trigger structure 5) built-in multi-stage noise rejection circuit 6) function: - when m3 is high or open: the phase excited (driven) is advanced one step on each clk rising edge. - when m3 is low: the phase is advanced one step by both rising and falling edges, for a total of two steps per cycle. clk input acquisition timing (m3 = low) ? cwb (method for setting the rotation direction) 1) pin circuit type: built-in pull-up resistor (20k , typical) cmos schmitt trigger structure 2) function: - when cwb is low: the motor turns in the clockwise direction. - when cwb is high: the motor turns in the counterclockwise direction. 3) notes: when m3 is low, the cwb input must not be changed for about 6.25 s before or after a rising or falling edge on the clk input. ? return (forcible return to the or igin for the currently excited phase) 1) pin circuit type: built-in pull-up resistor (20k , typical) cmos schmitt trigger structure 2) built-in noise rejection circuit 3) notes: the currently excited (driven) phase can be forcibly moved to the origin by switching this input from low to high. normally, if this input is unused, it must be left open or connected to v cc 2. ? enable (controls the on/off state of the a, a, b, and b excitation drive outputs and sel ects either operating or hold as the internal state of this hybrid ic.) 1) pin circuit type: built-in pull-up resistor (20k , typical) cmos schmitt trigger structure 2) function: - when enable is high or open: normal operating state - when enable is low: this hybrid ic goes to the hol d state and excitation drive output (motor current) is forcibly turned off. in this mode, the hybrid ic system clock is stopped and no inputs other than the reset input have any effect on the hybrid ic state. excitation counter up/down control output switching timing clk input system clock phase excitation counter clock control output timing a06845
stk672-040-e no. 5227-10/19 ? m1, m2, and m3 (excitation mode and clk input edge timing selection) 1) pin circuit type: built-in pull-up resistor (20k , typical) cmos schmitt trigger structure 2) function: m2 0 0 1 1 m1 m3 0 1 0 1 phase switching clock edge timing 1 2 phase excitation 1-2 phase excitation w1-2 phase excitation 2w1-2 phase excitation rising edge only 0 1-2 phase excitation w1-2 phase excitation 2w1-2 phase excitation 4w1-2 phase excitation rising and falling edges 3) valid mode setting timing: applications must not change the mode in the period 5 s before or after a clk signal rising or falling edge. mode setting acquisition timing ? m4 and m5 (microstepping mode rotation vector locus setting) m4 1 0 1 0 m5 1 0 0 1 mode circular see page 11 for details on the current division ratio. ? reset (resets all parts of the system.) 1) pin circuit type: built-in pull-up resistor (20k , typical) cmos schmitt trigger structure 2) function: - all circuit states are set to their initial values by settin g the reset pin low. (note that the pulse width must be at least 10 s.) at this time, the a and b phases are set to their origin , regardless of the excitation mode. the output current goes to about 71% after the reset is released. 3) notes: when power is first applied to this hybrid ic, vref must be established by applying a reset. applications must apply a power on reset when the v cc 2 power supply is first applied. ? vref (sets the current level used as the reference for constant-current detection.) 1) pin circuit type: analog input structure 2) function: - constant-current control can be applied to the motor excitation current at 100% of the rated current by applying a voltage less than the control system power supply voltage v cc 2 minus 2.5v. - applications can apply constant-current control proportiona l to the vref voltage, with this value of 2.5v as the upper limit. mode switching timing excitation counter up/down clk input system clock mode setting m1 to m3 mode switching clock hybrid ic internal setting state phase excitation clock a06846 phase b phase a circular 3 2 1 itf02273 2 1 3
stk672-040-e no. 5227-11/19 output pin functions pin no. symbol function pin circuit type 19 moi phase excitation origin monitor standard cmos structure 20, 21 mo1, mo2 phase excitation sta te monitor standard cmos structure output signal functions and timing ? a, a, b, and b (motor phase excitation outputs) 1) function: - in the 4 phase and 2 phase excitation modes, a 3.75 s (typical) interval is set up between the a and a and b and b output signal transition times. ? mo1, mo2, and moi (phase excitation state monitors) 1) pin circuit type: standard cmos structure 1) function: - output of the current phase excitation output state. phase coordinate phase a phase b phase a phase b mo1 1 0 0 1 mo2 0 1 0 1 moi outputs a 0 when each phase is at the origin, and outputs a 1 otherwise. ? current division ratios set by m3, m4, and m5 values provided for reference purposes. mode circular m4 = 1 m4 = 0 m4 = 1 m4 = 1 setting m3 = 0 m3 = 1 m5 = 1 m5 = 0 m5 = 0 m5 = 1 units number of steps 14 15 15 13 1/16 2w1-2 20 25 23 19 1/8 2/16 31 34 33 28 3/16 2w1-2 40 44 42 39 2/8 4/16 48 51 49 45 5/16 2w1-2 55 62 57 54 3/8 6/16 65 69 65 62 7/16 2w1-2 71 77 71 69 4/8 8/16 77 82 77 74 9/16 2w1-2 83 88 85 82 5/8 10/16 88 92 89 85 11/16 2w1-2 92 95 95 92 6/8 12/16 97 98 98 94 13/16 current division ratio 4w1-2 2w1-2 100 100 100 100 % 7/8 14/16 [load conditions] v cc 1 = 24v, v cc 2 = 5v, r/l = 3.5/3.8mh 2 1 3
stk672-040-e no. 5227-12/19 phase states during excitation switching ? excitation phases before and after excita tion mode switching b24 24 27 28 31 3 4 5 8 11 12 15 16 19 20 25 a a a 0 16 17 1 a a b b b24 25 26 27 28 29 30 31 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 24 26 28 30 0 2 4 6 8 10 12 14 16 18 20 22 22 23 a a b b 8 9 12 4 28 20 20 24 28 0 4 8 12 16 b24 26 28 30 a a a 0 16 18 20 22 24 28 0 4 8 12 16 20 20 28 4 12 20 28 4 0 12 16 16 18 20 22 24 25 27 29 31 1 3 5 7 9 23 22 8 24 20 10 26 18 12 16 14 28 30 6 4 2 0 11 21 13 19 15 17 24 28 0 4 8 12 16 20 26 28 30 0 2 4 6 8 10 12 14 2 4 6 b b a b a b 30 2 26 6 10 14 22 18 a b a b a b a b b a a b b 8 10 12 14 12 4 28 20 2w1-2 phase 2 phase 2w1-2 phase 1-2 phase 2w1-2 phase w1-2 phase w1-2 phase 2 phase w1-2 phase 1-2 phase w1-2 phase 2w1-2 phase 1-2 phase 2 phase 1-2 phase w1-2 phase 1-2 phase 2w1-2 phase 2 phase 1-2 phase 2 phase w1-2 phase 2 phase 2w1-2 phase 24 0 8 16 20 22 30 28 4 12 20 14 28 4 12 a b a b 29 1 25 5 9 13 21 24 28 0 4 8 12 16 20 17 a b a b 29 5 4 12 20 6 13 21 28 17 a b a b excitation phase immediately before setting the excitation mode excitation phase according to the first clock input pulse after changing the excitation mode setting (m1 and m2) a12399
stk672-040-e no. 5227-13/19 ? excitation phases before and after excitation mode switching b24 23 24 25 28 29 0 1 4 5 8 9 12 13 16 17 20 21 a a a 0 16 15 31 a a b b b24 25 26 27 28 29 30 31 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 24 26 28 30 0 2 4 6 8 10 12 14 16 18 20 22 22 23 a a b b 8 7 12 4 28 20 20 24 28 0 4 8 12 16 b24 30 a a a 0 16 22 24 28 0 4 8 12 16 20 20 28 4 12 16 28 24 20 0 4 12 16 18 20 22 24 25 27 29 31 1 3 5 7 9 23 22 8 24 20 10 26 18 12 16 14 28 30 6 4 2 0 11 21 13 19 15 17 24 28 0 4 8 12 16 20 26 28 30 0 2 4 6 8 10 12 14 6 b b a b a b 30 2 26 6 10 14 22 18 a b a b a b a b b a a b b 8 14 12 4 28 20 2w1-2 phase 2 phase 2w1-2 phase 1-2 phase 2w1-2 phase w1-2 phase w1-2 phase 2 phase w1-2 phase 1-2 phase w1-2 phase 2w1-2 phase 1-2 phase 2 phase 1-2 phase w1-2 phase 1-2 phase 2w1-2 phase 2 phase 1-2 phase 2 phase w1-2 phase 2 phase 2w1-2 phase 24 0 8 16 20 26 2 10 28 4 12 20 28 4 12 20 18 28 4 12 a b a b 30 3 27 7 11 15 23 24 28 0 4 8 12 16 20 19 a b a b 27 3 11 19 a b a b a12400
stk672-040-e no. 5227-14/19 excitation time and timing charts ? clk rising edge operation clk cwb mosfet gate signal comparator reference voltage reset m3 m2 m1 a a b b mo1 mo2 moi 71% 100% vref a 71% 100% vref b 0 1 0 0 2 phase excitation timing chart (m3 = 1) clk cwb mosfet gate signal comparator reference voltage reset m3 m2 m1 a a b b mo1 mo2 moi 71% 100% vref a 71% 100% vref b 0 1 0 1 1-2 phase excitation timing chart (m3 = 1) 0 clk cwb mosfet gate signal comparator reference voltage reset m3 m2 m1 a a b b mo1 mo2 moi 71% 100% vref a 71% 100% vref b 0 1 1 0 w1-2 phase excitation timing chart (m3 = 1) 0 40% 40% 92% 92% clk cwb mosfet gate signal comparator reference voltage reset m3 m2 m1 a a b b mo1 mo2 moi 71% 55% 100% vref a 71% 100% vref b 0 1 1 0 2w1-2 phase excitation timing chart (m3 = 1) 0 40% 20% 40% 92% 92% 83% 55% 20% 83% 1 itf02376
stk672-040-e no. 5227-15/19 ? clk rising and falling edge operation clk cwb mosfet gate signal comparator reference voltage reset m3 m2 m1 a a b b mo1 mo2 moi 71% 100% vref a 71% 100% vref b 0 0 1-2 phase excitation timing chart (m3 = 0) 0 clk cwb mosfet gate signal comparator reference voltage reset m3 m2 m1 a a b b mo1 mo2 moi 71% 100% vref a 71% 100% vref b 0 0 w1-2 phase excitation timing chart (m3 = 0) 0 40% 40% 92% 92% 1 clk cwb mosfet gate signal comparator reference voltage reset m3 m2 m1 a a b b mo1 mo2 moi 71% 55% 100% vref a 71% 100% vref b 0 1 0 2w1-2 phase excitation timing chart (m3 = 0) 0 40% 20% 40% 92% 92% 83% 55% 20% 83% clk cwb mosfet gate signal comparator reference voltage reset m3 m2 m1 a a b b mo1 mo2 moi vref a vref b 0 1 0 4w1-2 phase excitation timing chart (m3 = 0) 0 1 71% 55% 65% 100% 40% 48% 20% 31% 92% 83% 77% 14% 97% 88% 71% 55% 65% 100% 40% 48% 20% 31% 92% 83% 77% 14% 97% 88% itf02377
stk672-040-e no. 5227-16/19 thermal design the main elements internal to this hybrid ic with la rge average power losses are the current control devices, the regenerative current diodes, and the current detection resistor. since sine wave drive is used, the average power loss during microstepping drive can be approximated by applying a waveform factor of 0.64 to the square wave loss during 2 phase excitation. the losses in the various excitation modes are as follows. 2 phase excitation pd 2ex = (vsat+vdf) i oh t2 + (vsat t1+vdf t3) 1-2 phase excitation pd 1-2ex = 0.64 {(vsat+vdf) i oh t2 + (vsat t1+vdf t3)} w1-2 phase excitation pd w1-2ex = 0.64 {(vsat+vdf) i oh t2 + (vsat t1+vdf t3)} 2w1-2 phase excitation pd 2w1-2ex = 0.64 {(vsat+vdf) i oh t2 + (vsat t1+vdf t3)} 4w1-2 phase excitation pd 4w1-2ex = 0.64 {(vsat+vdf) i oh t2 + (vsat t1+vdf t3)} here, t1 and t3 can be determined from the same formulas for all excitation methods. t1 = n (1 ? i oh ) t3 = n ( ) however, the formula for t2 differs with the excitation method. 2 phase excitation t2 = ? (t1+t3) 1-2 phase excitation t2 = ? t1 w1-2 phase excitation t2 = ? t1 2w1-2 phase excitation t2 = ? t1 4w1-2 phase excitation motor phase current model figure (2 phase excitation) fclock : clk input frequency (hz) vsat : the voltage drop of the power mosfet and the current detection resistor (v) vdf : the voltage drop of the body diode and the current detection resistor (v) i oh : phase current peak value (a) t1 : phase current rise time (s) v cc 1 : supply voltage applied to the motor (v) t2 : constant-current operating time (s) l : motor inductance (h) t3 : phase switching current regeneration time (s) r : motor winding resistance ( ) 2 fclock 2 fclock oh i 4 fclock 4 fclock oh i 8 fclock 8 fclock oh i 16 fclock 16 fclock oh i 16 fclock 16 fclock oh i 0.88 r l + ? 1 cc v 0.88 r + r l ? 0.88 1 cc v r oh i 0.88 1 cc v + + + fclock 2 fclock 3 fclock 7 fclock 15 t3 t1 t2 i oh a12401
stk672-040-e no. 5227-17/19 determine c-a for the heat sink from the average power loss determined in the previous item. tc max: hybrid ic substrate temperature ( c) c-a = [ c/w] ta: application internal temperature ( c) pd ex : hybrid ic internal average loss (w) determine c-a from the above formula and then size s (in cm 2 ) of the heat sink from the graphs shown below. the ambient temperature of the device will vary greatly acco rding to the air flow conditions within the application. therefore, always verify that the size of the heat sink is adequate to assure that the hybrid ic back surface (the aluminum plate side) will never exceed a tc max of 105 c, whatever the operating conditions are. next we determine the usage conditions with no heat sink by determining the allowable hybrid ic internal average loss from the thermal resistance of the h ybrid ic substrate, namely 23c/w. for a tc max of 105c at an ambient temperature of 50c pd ex = = 2.3w for a tc max of 105c at an ambient temperature of 40c pd ex = = 2.8w this hybrid ic can be used with no heat sink as long as it is used at operating conditions below the losses listed above. (see tc ? pd curve in the graph on page 19.) the junction temperature, tj, of each device can be determin ed from the loss pds in each transistor and the thermal resistance j-c. tj = tc + j-c pds (c) here, we determine pds, the loss for each transistor, by determining pd ex in each excitation mode. pds = pd ex /4 the steady-state thermal resistance j-c of a power mosfet is 9.5 c/w. ex pd ta - max tc 23 50 - 105 23 40 - 105 ic internal average power loss, pd - w c-a - pd heat sink thermal resistance, c-a - c/w itf02378 heat sink surface area, s - cm 2 c-a - s heat sink thermal resistance, c-a - c/w itf02389 4 0 8 12 16 20 0246810121416 4 0 c 6 0 c g u a r a n t e e d a m b i e n t t e m p e r a t u r e c-a= tc max -- ta (c/w) tc max=105c pd no. fin 23.0 (c/w) 5 0 c 2 1.0 3 7 5 10 2 10 23 57 100 23 5 no. fin 23.0 (c/w) 2 m m a l p l a t e ( n o s u r f a c e f i n i s h ) ( f l a t b l a c k s u r f a c e f i n i s h ) vertical standing type natural convection air cooling
stk672-040-e no. 5227-18/19 itf02380 42 40 0 46 44 50 48 54 56 52 58 0 4.5 5.0 5.5 6.0 tc = 25c fc - v cc 2 pwm frequency, fc - khz supply voltage, v cc 2 - v itf02381 itf02382 itf02383 itf02385 itf02384 itf02386 itf02387 40 0 42 44 54 46 48 50 52 58 56 0 20 40 60 80 100 120 140 v cc 2 = 5v (fixed) fc - tc pwm frequency, fc - khz substrate temperature, tc - c 1 0 2 3 4 0 1.0 2.0 3.0 vsat - i oh output saturation voltage, vsat - v t c = 1 0 5 c t c = 2 5 c phase output current, i oh -a 0 1 2 3 4 0 1.0 2.0 3.0 v cc 2 = 5v (fixed) t c = 1 0 5 c t c = 2 5 c i oh - vdf phase output current, i oh - a fet diode forward voltage, vdf - v 0.2 0 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0 20304050 tc = 25c 1.5a 1.0a 0.5a v r e f = 0 v test motor: pk244-01b i oh -v cc 1 motor output current, i oh -a supply voltage, v cc 1 - v 0.4 0.6 0.2 0 0.8 1.0 1.2 1.4 1.6 1.8 0 20 40 60 80 100 120 140 1.5a 1.0a 0.5a vref=0v test motor: pk244-01b v cc 1 = 24v v cc 2 = 5v i oh -tc phase output current, i oh - a substrate temperature, tc - c 10 0 20 30 40 50 60 100 1k 10k 50k 1 - 2 e x 2 w 1 - 2 e x , 4 w 1 - 2 e x 2 e x 2 e x ( v c c = 4 6 v i o h = 1 . 0 a ) v cc 1 = 24v, v cc 2 = 5v test motor: pk244-01b (r = 3.3 /l = 3mh) with i oh set at 1.0a tc - pps substrate temperature increase, tc - c input pps - hz w 1 - 2 e x 0.4 0.2 0 0.6 0.8 1.0 1.2 10 20 30 40 50 i o h = 1 . 0 a i o h = 0 . 5 a tc = 25c, v cc 2 = 5v pk244-01b motor common pin current with one phase held. im - v cc 1 motor com current, im - a supply voltage, v cc 1 - v v cc 2 = 5v (fixed)
stk672-040-e no. 5227-19/19 ps motor output current, i oh , i ol , ioave - a vref - i motor current setting voltage, vref - v itf02388 power loss, pd - w tc - pd(typ) substrate temperature increase, tc - c itf02389 0.2 0 0.4 0.6 1.2 0.8 1.0 1.4 1.6 0 0.5 1.0 1.5 2.0 l o a v e i o l i o h 20 30 10 0 40 60 50 70 80 90 02 145 36 self cooling for the independent (free standing) ic with no heat sink tc = 25c v cc 1 = 24v v cc 2 = 5v pk244-01b in hold mode on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc mak es no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability ar ising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s techn ical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorize d for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other appli cation in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of persona l injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture o fthe part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws a nd is not for resale in any manner.

▲Up To Search▲

Price & Availability of EN5227

	To Download EN5227 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .